INERTIAL AND TRANSPORT DELAY IN VHDL

AUTHOR : ARUN KATHIRU (HARDWARE DESIGN ENGINEER)

inertial delay:
------------------
Inertial delay models the delays often found in switching circuits. It represents the time for which an input value must be stable before the value is allowed to propagate to the output. In addition, the value appears at the output after the specified delay. If the input is not stable for the specified time, no output change occurs. When used with signal assignments, the input value is represented by the value of the expression on the right-hand-side and the output is represented by the target signal.
This delay model is often used to filter out unwanted spikes and transients on signals.

transport delay:
------------------
Transport delay models the delays in hardware that do not exhibit any inertial delay. This delay represents pure propagation delay, that is, any changes on an input is transported to the output, no matter how small, after the specified delay. To use a transport delay model, the keyword transport must be used in a signal assignment statement.